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SLUU150 – February 2003
If the target application requires fault timing other than that provided by the default EVM setup, a
new value of timing capacitor can be calculated from equation (3). When selecting from the
readily available capacitor values for the result of equation (3), default to a slightly larger, rather
than smaller, capacitor.
C FLT +
55
t FLT
3.75
(3)
where
?
?
C FLT is the calculated value in microfarads,
t FLT is the desired timeout period in seconds
4.6
Using the EN Pin to Adjust Undervoltage Lockout (UVLO)
The TPS2390 and TPS2391 devices have an internal UVLO circuit, which keeps the load
disabled when the input supply voltage is low. The internal threshold is set to a nominal 30 V, at
the RTN input with respect to – VIN, with a maximum specification value of 36 V. This setting is
targeted at general telecom applications. However, it is possible to raise the minimum start-up
threshold, and potentially tighten the tolerance window of the UVLO function, by using the
enable input comparator.
Where the desired UVLO voltage is greater (more negative) than the internal threshold, a
resistor divider on the input supply can be used to enable the load at this minimum voltage level.
The divided down input voltage then drives the EN pin. Resistor patterns R1 and R2 are
provided on the EVM to implement this function. The nominal enable comparator threshold is
1.4 V. Assuming the default R1 value of 200 k ? is used, the value of R2 is determined from
Equation 4.
R2 +
1.4 V
V UV * 1.4V
200 k W
(4)
where V UV is the desired UVLO threshold.
For example, to adjust the nominal UVLO to 40 V, the value of R2 required is 7.25 k ? , per
equation (4). Using the standard value of 7.32 k ? , the expected threshold is 39.65 V.
Evaluation Modules for Simple – 48-V Hot Swap Controllers
15
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